View MP7720DP_1049039.PDF datasheet online --- IC-ON-LINE

Datasheet File OCR Text:

MP7720
20W Class D Mono Single Ended Audio Amplifer
The Future of Analog IC Technology
DESCRIPTION
The MP7720 is a mono 20W Class D Audio Amplifier. It is one of MPS' second generation of fully integrated audio amplifiers which dramatically reduces solution size by integrating the following: 180m power MOSFETs Startup / Shutdown pop elimination Short circuit protection circuits Mute / Standby The MP7720 utilizes a single ended output structure capable of delivering 20W into 4 speakers. MPS Class D Audio Amplifiers exhibit the high fidelity of a Class A/B amplifier at efficiencies greater than 90%. The circuit is based on the MPS' proprietary variable frequency topology that delivers excellent PSRR, fast response time and operates on a single power supply.
FEATURES
* * * * * * * * * * * * * * * * 20W Output at VDD = 24V into a 4 load THD+N = 0.04% at 1W, 8 93% Efficiency at 20W Low Noise (190V Typical) Switching Frequency Up to 1MHz 9.5V to 24V Operation from a Single Supply Integrated Startup and Shutdown Pop Elimination Circuit Thermal Protection Integrated 180m Switches Mute/Standby Modes (Sleep) Available in Tiny 8-Pin SOIC and PDIP Packages Surround Sound DVD Systems Televisions Flat Panel Monitors Multimedia Computers Home Stereo Systems
APPLICATIONS
EVALUATION BOARD REFERENCE
Board Number EV0030 Dimensions 2.4"X x 3.5"Y x 1.2"Z
"MPS" and "The Future of Analog IC Technology" are Registered Trademarks of Monolithic Power Systems, Inc. AAM (Analog Adaptive Modulation) is a Trademark of Monolithic Power Systems, Inc.
TYPICAL APPLICATION
VDD OFF ON
4 EN VDD 6
1
PIN
PGND
8
THD+N vs Power (24V, 1KHz)
20 10
2
MP7720
NIN BS
5
THD+N (%)
+
3
AGND
SW
7
1
AUDIO INPUT
0.1
0.01
0.1
1 POWER (W)
10
30
MP7720-TPC01
MP7720_TAC_S01
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
1
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
PACKAGE REFERENCE
ABSOLUTE MAXIMUM RATINGS (1)
Supply Voltage VDD ...................................... 26V BS Voltage.................. VSW - 0.3V to VSW + 6.5V Enable Voltage VEN ........................ -0.3V to +6V VSW, VPIN, VNIN ........................... -1V to VDD + 1V AGND to PGND .......................... -0.3V to +0.3V Junction Temperature............................... 150C Lead Temperature ....................................260C Storage Temperature ..............-65C to +150C
TOP VIEW
PIN NIN AGND EN 1 2 3 4 8 7 6 5 PGND SW VDD BS
Recommended Operating Conditions
(2)
MP7720_PD01-SOIC8-PDIP8
Supply Voltage VDD .......................... 9.5V to 24V Operating Temperature TA.........-40C to +85C
Thermal Resistance
Part Number* MP7720DS MP7720DP * Package SOIC8 PDIP8 Temperature -40C to +85C -40C to +85C
(3)
SOIC8.................................... 105 ..... 40... C/W PDIP8 ..................................... 95 ...... 55... C/W
Notes: 1) Exceeding these ratings may damage the device. 2) The device is not guaranteed to function outside of its operating conditions. 3) Measured on approximately 1" square of 1 oz copper.
JA
JC
For Tape & Reel, add suffix -Z (eg. MP7720DS-Z) For Lead Free, add suffix -LF (eg. MP7720DS-LF-Z)
ELECTRICAL CHARACTERISTICS
VDD = 24V, VEN = 5V, TA = +25C, unless otherwise noted.
Parameters Supply Current Standby Current Quiescent Current Output Drivers SW On Resistance Short Circuit Current Inputs PIN, NIN Input Common Mode Voltage Range PIN, NIN Input Current EN Enable Threshold Voltage EN Enable Input Current Thermal Shutdown Thermal Shutdown Trip Point Thermal Shutdown Hysteresis Symbol Condition VEN = 0V Min Typ 1 1.5 0.18 5.0 0 VPIN = VNIN = 12V VEN Rising VEN Falling VEN = 5V TJ Rising VDD 2 1 1.4 1.2 1 150 30 VDD - 1.5 5 2.0 Max 5 3.0 Units A mA A V A V V A C C
Sourcing and Sinking Sourcing and Sinking
0.4
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
2
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
OPERATING SPECIFICATIONS
Circuit of Figure 1, VDD = 24V, VEN = 5V, TA = +25C, unless otherwise noted.
Parameters Standby Current Quiescent Current Power Output Symbol Condition VEN = 0V f = 1KHz, THD+N = 10%, 4 Load f = 1KHz, THD+N = 10%, 8 Load POUT = 1W, f = 1KHz, 4 Load POUT = 1W, f = 1KHz, 8 Load f = 1KHz, POUT = 1W, 4 Load f = 1KHz, POUT = 1W, 8 Load Min Typ 130 13 20 10 0.08 0.04 90 95 20 93 190 60 Max Units A mA W W % % % % KHz dB V dB
THD+ Noise
Efficiency Maximum Power Bandwidth Dynamic Range Noise Floor Power Supply Rejection
A-Weighted f = 1KHz
PIN FUNCTIONS
Pin # 1 2 3 4 5 Name PIN NIN AGND EN BS Description Amplifier Positive Input. PIN is the positive side of the differential input to the amplifier. Use a resistive voltage divider to set the voltage at PIN to VDD/2. See Figure 1. Amplifier Negative Input. NIN is the negative side of the differential input to the amplifier. Drive the input signal and close the feedback loop at NIN. See Figure 1. Analog Ground. Connect AGND to PGND at a single point. Enable Input. Drive EN high to turn on the amplifier, low to turn it off. High-Side MOSFET Bootstrap Input. A capacitor from BS to SW supplies the gate drive current to the internal high-side MOSFET. Connect a 0.1F capacitor from SW to BS. Place a 6.2V zener diode from BS to SW to prevent overstressing of the internal circuitry. Power Supply Input. VDD is the drain of the high-side MOSFET switch, and supplies the power to the output stage and the MP7720 internal control circuitry. In addition to the main bulk capacitor, bypass VDD to PGND with a 1F X7R capacitor placed close to pins 6 and 8. Switched Power Output. SW is the output of the MP7720. Connect the LC filter between SW and the output coupling capacitor. See Figure 1. Power Ground. Connect PGND to AGND at a single point.
6 7 8
VDD SW PGND
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
3
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL PERFORMANCE CHARACTERISTICS
20 10 20 10 100
10
THD+N (%) THD+N (%)
1 f=1KHz 0.1 f=10KHz f=100Hz 0.01 0.1 1 POUT (W)
MP7720-TPC02
1 f=1KHz f=10KHz 0.1 f=100Hz
THD+N (%)
1
0.1
10
30
0.01
0.1
1 POUT (W)
10
30
0.01
20
100 1K FREQUENCY (Hz)
10K
MP7720-TPC04
MP7720-TPC03
100
0 -20
AMPLITUDE (dBV)
-40 -60 -80 -100 -120
1
0.1
0.01
20
100 1K FREQUENCY (Hz)
10K
MP7720-TPC05
-140
20
100 1K FREQUENCY (Hz)
10K
MP7720-TPC06
AMPLITUDE (dBr)
10
THD+N (%)
0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 100 1K 10K FREQUENCY (Hz)
MP7720-TPC07
Frequency Response (Ref=2Vrms, AV=8.2)
+4 +2
AMPLITUDE (dBr) EFFICIENCY (%)
100 90 80 70 60 50 40 30 20 10 0
Efficiency vs POUT
25 20
POUT (W)
POUT vs VDD
0 -2 -4 -6 -8 -10 20 100 1K 10K FREQUENCY (Hz) 40K
15 10 5 0
0
5 10 15 20 25 OUTPUT POWER (W)
30
5
10
15
20 25 VDD (V)
30
35
MP7720-TPC08
MP7720-TPC09
MP7720-TPC10
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
4
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
OPERATION
The MP7720 is a single-ended Class D audio amplifier. It uses the Monolithic Power Systems patented Analog Adaptive ModulationTM to convert the audio input signal into pulses. These pulses drive an internal high-current output stage and, when filtered through an external inductor-capacitor filter, reproduce the input signal across the load. Because of the switching Class D output stage, power dissipation in the amplifier is drastically reduced when compared to Class A, B or A/B amplifiers while maintaining high fidelity and low distortion. The amplifier uses a differential input to the modulator. PIN is the positive input and NIN is the negative input. The common mode voltage of the input is set to half the DC power supply input voltage (VDD/2) through the resistive voltage divider formed by R2 and R3. The input capacitor C1 couples the AC signal at the input. The amplifier voltage gain is set by the combination of R1 and R4 and is calculated by the equation:
AV = -R4 R1
Pop Elimination The capacitor C9 passes only AC currents to the load. To insure that the amplifier passes low frequency signals, the time constant of C9*RLOAD needs to be long. However, when EN is asserted, the capacitor charges over a long period and in a normal amplifier can result in a turn on and/or turn off "pop." The MP7720 includes integrated circuitry that eliminates the turn on and turn off pop associated with the charging of the AC coupling capacitor. Short Circuit/Overload Protection The MP7720 has internal overload and short circuit protection. The currents in both the highside and low-side MOSFETs are measured and if the current exceeds the 5.0A short circuit current limit, both MOSFETs are turned off. The MP7720 then restarts with the same power up sequence that is used for normal starting to prevent a pop from occurring after a short circuit condition is removed. Mute/Enable Function The MP7720 EN input is an active high enable control. To enable the MP7720, drive EN with a 2.0V or greater voltage. To disable the amplifier, drive it below 0.4V. While the MP7720 is disabled, the VDD operating current is less than 5A and the output driver MOSFETs are turned off. The MP7720 requires approximately 500ms from the time that EN is asserted (driven high) to when the amplifier begins normal operation.
The output driver stage uses two 180m N-Channel MOSFETs to deliver the pulses to the LC output filter which in turn drives the load. To fully enhance the high-side MOSFET, the gate is driven to a voltage higher than the source by the bootstrap capacitor between SW and BS. While the output is driven low, the bootstrap capacitor is charged from VDD through an internal circuit on the MP7720. The gate of the high-side MOSFET is driven high from the voltage at BS, forcing the MOSFET gate to a voltage higher than VDD and allowing the MOSFET to fully turn on, reducing power loss in the amplifier.
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
5
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
APPLICATION INFORMATION
COMPONENT SELECTION
The MP7720 uses a minimum number of external components to complete a Class D audio amplifier. The circuit of Figure 1 is optimized for a 24V power supply and a 1.5V RMS maximum input signal. This circuit should be suitable for most applications. However, if this circuit is not suitable, use the following sections to determine how to customize the amplifier for a particular application. Setting the Voltage Gain The maximum output voltage swing is limited by the power supply. To achieve the maximum power out of the MP7720 amplifier, set the gain such that the maximum input signal results in the maximum output voltage swing. The maximum output voltage swing is VDD/2. For a given input signal voltage, where VIN(pk) is the peak input voltage, the maximum voltage gain is:
A V (MAX) = VDD 2 x VIN (pk )
Table 1--Switching Frequency vs. Integrating Capacitor and Feedback Resistor (see Figure 1)
Gain (V/V) 3.9 8.2 8.3 12.0 17.4 25.5 5.6 8.2 11.9 12.0 17.4 25.5 33.0 Gain (dB) 15.0 18.3 21.5 21.6 24.8 28.1 15.0 18.3 21.5 21.6 24.8 28.1 30.4 R4 (k) 39 82 39 120 82 120 56 82 56 120 82 120 330 R1 (k) 10 10 4.7 10 4.7 4.7 10 10 4.7 10 4.7 4.7 10 C3 6.8nF 3.3nF 6.8nF 2.2nF 3.3nF 2.2nF 8.2nF 5.6nF 8.2nF 4.7nF 5.6nF 4.7nF 1.8nF FSW 660KHz 660KHz 660KHz 610KHz 660KHz 610KHz 670KHz 720KHz 670KHz 620KHz 720KHz 620KHz 700KHz VDD (V) 12 12 12 12 12 12 24 24 24 24 24 24 24
This voltage gain setting results in the peak output voltage approaching it's maximum for the maximum input signal. In some cases the amplifier is allowed to overdrive slightly, allowing the THD to increase at high power levels, and so a higher gain than AV (max) is required. Setting the Switching Frequency The idle switching frequency is a function of VDD, the capacitor C3 and the feedback resistor R4. Lower switching frequencies result in more inductor ripple, causing more quiescent output voltage ripple and increasing the output noise and distortion. Higher switching frequencies result in more power loss. The optimum quiescent switching frequency is approximately 600KHz to 700KHz. Refer to the Operating Specifications for recommended values.
Choosing the LC Filter The Inductor-Capacitor (LC) filter converts the pulse train at SW to the output voltage that drives the speaker. Typical values for the LC filter are shown in Figure 1, 10H inductor and 0.47F capacitor. The characteristic frequency of the LC filter needs to be high enough to allow high frequency audio to the output, yet needs to be low enough to filter out high frequency products of the pulses from SW. The characteristic frequency of the LC filter is:
f0 = 1 2(LC ) 2
1
The voltage ripple at the output is approximated by the equation:
f VRIPPLE VDD x 0 f SW
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
6
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER The quality factor (Q) of the LC filter is important. If this is too low, output noise will increase, if this is too high, then peaking may occur at high signal frequencies reducing the passband flatness. The circuit Q is set by the load resistance (speaker resistance, typically 4 or 8). The Q is calculated as:
Q = 0 x L L = 2 x f 0 x R R
0 is the characteristic frequency in radians per second and f0 is in Hz. Use an LC filter with Q between 0.7 and 1. The actual output ripple and noise is greatly affected by the type of inductor and capacitor used in the LC filter. Use a film capacitor and an inductor with sufficient power handling capability to supply the output current to the load. The inductor should exhibit soft saturation characteristics. If the inductor exhibits hard saturation, it should operate well below the saturation current. Gapped ferrite, MPP, Powdered Iron, or similar type toroidal cores are recommended. If open or shielded bobbin ferrite cores are used for multi-channel designs, make sure that the start windings of each inductor line up (all starts going toward SW pin, or all starts going toward the output) to prevent crosstalk or other channel-to-channel interference. Output Coupling Capacitor The output AC coupling capacitor C9 serves to block DC voltages and thus passes only the amplified AC signal from the LC filter to the load. The combination of the coupling capacitor, C9 and the load resistance results in a firstorder high-pass filter. The value of C9 should be selected such that the required minimum frequency is still allowed to pass. The output corner frequency (-3dB point), fOUT, can be calculated as:
fOUT = 1 2 x x R LOAD x C9
Input Coupling Capacitor The input coupling capacitor C1 is used to pass only the AC signal at the input. In a typical system application, the source input signal is typically centered around the circuit ground, while the MP7720 input is at half the power supply voltage (VDD/2). The input coupling capacitor transmits the AC signal from the source to the MP7720 while blocking the DC voltage. Choose an input coupling capacitor such that the corner frequency (fIN) is less than the passband frequency. The corner frequency is calculated as:
fIN = 1 2 x x R1x C1
Power Source For maximum output power, the amplifier circuit requires a regulated external power source to supply the power to the amplifier. The higher the power supply voltage, the more power can be delivered to a given load resistance, however if the power source voltage exceeds the maximum operating voltage of 24V, the MP7720 may sustain damage. The power supply rejection of the MP7720 is excellent (typically 60dB), however noise at the power supply can get to the output, so care must be taken to minimize power supply noise within the pass-band frequencies. Bypass the power supply with a large capacitor (typically aluminum electrolytic) along with a smaller 1F ceramic capacitor at the MP7720 VDD supply pins. Circuit Layout The circuit layout is critical for optimum performance and low output distortion and noise. Place the following components as close to the MP7720 as possible: Power Supply Bypass, C5 C5 carries the transient current for the switching input stage. To prevent overstressing of the MP7720 and excessive noise at the output, place the power supply bypass capacitor as close to pins 6 (VDD) and 8 (PGND) as possible.
Set the output corner frequency (fOUT) at or below the minimum required frequency. The output coupling capacitor carries the full load current, so a capacitor should be chosen such that its ripple current rating is greater than the maximum load current. Low ESR aluminum electrolytic capacitors are recommended.
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
7
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER Output Catch Diode, D1 D1 carries the current over the dead-time while both MOSFET switches are off. Place D1 between pins 7 (SW) and 8 (PGND) to prevent the voltage at SW from swinging excessively below ground. Input Modulator Capacitor, C3 C3 is used to set the amplifier switching frequency and is typically on the order of a few nanofarads. Place C3 as close to the differential input pins (1 and 2) as possible to reduce distortion and noise. Reference Bypass Capacitor, C2 C2 filters the 1/2 VDD reference voltage at the PIN input (pin 1). Place C2 as close to PIN as possible to improve power supply rejection and reduce distortion and noise at the output. Use two separate ground planes, analog ground (AGND) and power ground (PGND), and connect the two grounds together at a single point to prevent noise injection into the amplifier input to reduce distortion. Power components (C5, D1, C6 and C8) connect to the power ground. The quiet analog components (C2, C3, R2, and the input source ground) connect to the analog ground. Place the input and feedback resistors R1 and R4 as close to the NIN input as possible. Make sure that any traces carrying the switching node (SW) voltage are separated far from any input signal traces. If multiple amplifiers are used on a single board, make sure that each channel is physically separated to prevent crosstalk. If it is required to run the SW trace near the input, shield the input with a ground plane between the traces. Make sure that all inductors used on a single circuit board have the same orientation. If multiple channels are used on a single board, make sure that the power supply is routed from the source to each channel individually, not serially. This prevents channel-to-channel coupling through the power supply input. Electro-Magnetic Interference (EMI) Considerations Due to the switching nature of the Class D amplifier, care must be taken to minimize the effects of electromagnetic interference from the amplifier. However, with proper component selection and careful attention to circuit layout, the effects of the EMI due to the amplifier switching can be minimized. The power inductors are a potential source of radiated emissions. For the best EMI performance, use toroidal inductors, since the magnetic field is well contained inside the core. However toroidal inductors can be expensive to wind. For a more economical solution, use shielded gapped ferrite or shielded ferrite bobbin core inductors. These inductors typically do not contain the field as well toroidal inductors, but usually can achieve a better balance of good EMI performance with low cost. The size of high-current loops that carry rapidly changing currents needs to be minimized. To do this, make sure that the VDD bypass capacitor (C5) is as close to the MP7720 as possible. Nodes that carry rapidly changing voltage, such as SW, need to be made as small as possible. If sensitive traces run near a trace connected to SW, place a ground shield between the traces.
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
8
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
TYPICAL APPLICATION CIRCUIT
OFF ON
4 EN VDD 6 + 8
VDD 9.5V to 24V
1
C3 5.6nF
PIN
PGND
2
MP7720
NIN BS
5
3
AGND
SW
7
D2 6.2V
C10 390pF AUDIO INPUT
D1 1A 30V
C4 10pF
+
MP7720_F01
Figure 1--20W Mono Typical Application Circuit
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
9
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
PACKAGE INFORMATION
SOIC8
MP7720 Rev. 1.9 3/13/2006
www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
10
MP7720 - 20W CLASS D MONO SINGLE ENDED AUDIO AMPLIFIER
PDIP8
0.367(9.32) 0.387(9.83) 8 5
PIN 1 ID
0.240(6.10) 0.260(6.60)
1
4
TOP VIEW
0.320( 8.13) 0.400(10.16) 0.100(2.54) BSC 0.300(7.62) 0.325(8.26)
0.125(3.18) 0.145(3.68) 0.015(0.38) 0.035(0.89) 0.120(3.05) 0.140(3.56) 0.008(0.20) 0.014(0.36)
0.050(1.27) 0.065(1.65) 0.015(0.38) 0.021(0.53)
FRONT VIEW
SIDE VIEW
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN BRACKET IS IN MILLIMETERS. 2) PACKAGE LENGTH AND WIDTH DO NOT INCLUDE MOLD FLASH, OR PROTRUSIONS. 3) DRAWING CONFORMS TO JEDEC MS-001, VARIATION BA. 4) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Please contact MPS for current specifications. Users should warrant and guarantee that third party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not assume any legal responsibility for any said applications.
MP7720 Rev. 1.9 3/13/2006 www.MonolithicPower.com MPS Proprietary Information. Unauthorized Photocopy and Duplication Prohibited. (c) 2006 MPS. All Rights Reserved.
11

▲Up To Search▲

Price & Availability of MP7720DP

	To Download MP7720DP Datasheet File
If you can't view the Datasheet, Please click here to try to view without PDF Reader .